CISC:
Complex instruction set computer (CISC) is a processor design where single
instructions can execute several low-level operations or are capable of
multi-step operations or addressing modes within single instructions.
CISC contains large number of complex instructions. It facilitates
the extensive manipulation of low-level computational elements and events such
as memory, binary arithmetic, and addressing.
RISC:
Reduced instruction set computer (RISC) is a microprocessor
that is designed to perform a smaller number of types of computer instructions
so that it can operate at a higher speed.
RISC retains only those instructions that can be overlapped
and made to execute in one machine cycle or less. RISC has small number of
instructions and the instruction size is constant.
Difference:
The main difference between RISC and CISC is in the number of
computing cycles each of their instructions take. With CISC, each instruction
may utilize a much greater number of cycles before completion than in RISC.
The reason behind the
difference in number of cycles utilized is the complexity and goal of
their instructions. In RISC, each instruction is only meant to achieve a very
small task. So if you want a
complex task done, then you need a lot of these instructions strung together.
complex task done, then you need a lot of these instructions strung together.
Performance:
The CISC approach
attempts to minimize the number of instructions per program, sacrificing the
number of cycles per instruction. RISC does the opposite, reducing the cycles
per instruction at the cost of the number of instructions per program.
In terms of the list of
available instructions, RISC has the longer one over CISC. This is because each
small step may need a separate instruction, unlike in CISC where a single
instruction would already cover multiple steps. Although CISC may be easier for
programmers, it also has its downside. Using CISC may not be as efficient as
when you use RISC. This is because inefficiencies in the CISC code will then be used again and again, leading
to wasted cycles. Using RISC allows the programmer to remove unnecessary code
and prevent wasting cycles.
Comparison:
CISC
l
Increases instruction size of instruction sets.
l
Designs ever more complex instructions.
l
Provides more addressing modes.
RISC
l
Attempts to make architecture simpler.
l
Reduced number of instructions.
l
Reduces the number of memory accesses required by
increasing the number of registers.
l
Reduces the number of addressing modes
CISC instructions utilize more cycles than RISC
CISC has way more complex instructions than RISC
CISC typically has fewer instructions than RISC
CISC implementations tend to be slower than RISC
implementations
Computers typically use CISC while tablets,
smartphones and other devices use RISC.
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